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Vortex86EX UART errata?
2015 年 11 月 15 日
05:42:44
uaa
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2013 年 12 月 02 日
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I am trying to run OpenBSD on 86duino Educake and sometimes serial console is unstable.
I found the workaround in hardware/86duino/x86/cores/arduino/uart.c, what does it mean?

----
#ifdef _VORTEX86EXC_UART_WORKAROUND
/* To avoid Vortex86EX(D) write sync. issue. */
io_DisableINT();
{
lcr = io_inpb(port->LCR);
io_outpb(port->LCR, 0x80);

do {
io_outpb(port->DLLSB, port->old_lsb);
} while (io_inpb(port->DLLSB) != port->old_lsb);

do {
io_outpb(port->DLMSB, port->old_msb);
} while (io_inpb(port->DLMSB) != port->old_msb);

io_inpb(0x80); // do IO delay
io_outpb(port->LCR, lcr);
}
io_RestoreINT();
#else
_16550_DLAB_Out(port, port->DLLSB, port->old_lsb);
_16550_DLAB_Out(port, port->DLMSB, port->old_msb);
#endif
----

And, is there any errata in Vortex86EX (not only UART) and any official announcements?

2015 年 11 月 16 日
12:12:30
Android_Lin
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2014 年 04 月 01 日
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Can you describe the unstable condition for details and what 86Duino IDE version you use?

In addition, the workaround method in uart.cpp avoids the uart hardware issue on Vortex86EX C version.

Android_Lin

2015 年 11 月 17 日
04:35:42
uaa
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2013 年 12 月 02 日
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The problem occurs running OpenBSD.
OpenBSD kernel boots, and we can get some kernel messages through
86duino EduCake's DB9 connector (as com3/tty03) port. But no login: prompt.
No 86duino IDE based software issue.

Here is a log. Kernel is reconfigured for 86duino EduCake with config(8) command.
----
>> OpenBSD/i386 BOOT 3.27
boot>
booting hd0a:/bsd: 7693508+2034088+193540+0+1069056 [72+414704+409565]=0xb465b4
entry point at 0x2000d4

[ using 824756 bytes of bsd ELF symbol table ]
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
Copyright (c) 1995-2015 OpenBSD. All rights reserved. http://www.OpenBSD.org

OpenBSD 5.8-current (GENERIC) #1328: Sat Nov 14 22:52:44 MST 2015
deraadt@i386.openbsd.org:/usr/src/sys/arch/i386/compile/GENERIC
RTC BIOS diagnostic error 39
cpu0: Vortex86 SoC (686-class) 301 MHz
cpu0: FPU,TSC,CX8,SEP,CMOV,MMX,PERF
real mem = 133246976 (127MB)
avail mem = 118214656 (112MB)
mpath0 at root
scsibus0 at mpath0: 256 targets
mainbus0 at root
bios0 at mainbus0: date 06/23/99, BIOS32 rev. 0 @ 0xff046, SMBIOS rev. 2.7 @ 0x7fe1420 (6 entries)
bios0: vendor coreboot version "4.0-4750-g745041e-dirty" date 03/12/2015
bios0: DMP Vortex86EX
acpi at bios0 function 0x0 not configured
pcibios0 at bios0: rev 2.1 @ 0xf0000/0x10000
pcibios0: PCI IRQ Routing Table rev 1.0 @ 0xf4ce0/224 (12 entries)
pcibios0: no compatible PCI ICU found: ICU vendor 0x17f3 product 0x6011
pcibios0: Warning, unable to fix up PCI interrupt routing
pcibios0: PCI bus #1 is the last bus
bios0: ROM list: 0xef000/0x1000!
cpu0 at mainbus0: (uniprocessor)
pci0 at mainbus0 bus 0: configuration mode 1 (bios)
pchb0 at pci0 dev 0 function 0 "RDC R6025 Host" rev 0x01
ppb0 at pci0 dev 1 function 0 "RDC R1031 PCIe" rev 0x02: irq 15
pci1 at ppb0 bus 1
pcib0 at pci0 dev 7 function 0 "RDC R6011 SB" rev 0x01
pcib1 at pci0 dev 7 function 1 "RDC R6011 SB" rev 0x01
vte0 at pci0 dev 8 function 0 "RDC R6040 Ethernet" rev 0x00: irq 9, address 00:1b:eb:xx:xx:xx
ukphy0 at vte0 phy 1: Generic IEEE 802.3u media interface, rev. 0: OUI 0x000bb4, model 0x0005
ohci0 at pci0 dev 10 function 0 "RDC R6060 USB" rev 0x13: irq 14, version 1.0, legacy support
ehci0 at pci0 dev 10 function 1 "RDC R6061 USB2" rev 0x07: irq 10
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 "RDC EHCI root hub" rev 2.00/1.00 addr 1
pciide0 at pci0 dev 12 function 0 "RDC R1012 IDE" rev 0x03: DMA, channel 0 configured to native-PCI, channel 1 configured to native-PCI
pciide0: using irq 11 for native-PCI interrupt
wd0 at pciide0 channel 0 drive 0:
wd0: 1-sector PIO, LBA, 3759MB, 7698432 sectors
pciide0: channel 1 ignored (disabled)
azalia0 at pci0 dev 14 function 0 "RDC R3010 HDA" rev 0x02: irq 7
azalia0: codecs: Realtek ALC262
audio0 at azalia0
"RDC R1060 USB Device" rev 0x03 at pci0 dev 15 function 0 not configured
"RDC R1331 MC" rev 0x00 at pci0 dev 16 function 0 not configured
"RDC R1710 SPI" rev 0x01 at pci0 dev 16 function 1 not configured
"RDC R1070 CAN" rev 0x00 at pci0 dev 17 function 0 not configured
isa0 at pcib0
isadma0 at isa0
com0 at isa0 port 0x3f8/8 irq 4: ns16550a, 16 byte fifo
com1 at isa0 port 0x2f8/8 irq 3: ns16550a, 16 byte fifo
com2 at isa0 port 0x3e8/8 irq 5: ns16550a, 16 byte fifo
com3 at isa0 port 0x2e8/8 irq 12: ns16550a, 16 byte fifo
com3: console
pckbc0 at isa0 port 0x60/5 irq 1 irq 12
pckbd0 at pckbc0 (kbd slot)
wskbd0 at pckbd0: console keyboard
pcppi0 at isa0 port 0x61
spkr0 at pcppi0
npx0 at isa0 port 0xf0/16: reported by CPUID; using exception 16
isa at pcib1 not configured
usb1 at ohci0: USB revision 1.0
uhub1 at usb1 "RDC OHCI root hub" rev 1.00/1.00 addr 1
nvram: invalid checksum
run0 at uhub0 port 2 configuration 1 interface 0 "Ralink 802.11 n WLAN" rev 2.00/1.01 addr 2
run0: MAC/BBP RT3070 (rev 0x0201), RF RT3020 (MIMO 1T1R), address 00:01:8e:37:38:0d
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
root on wd0a (e92757a70c986904.a) swap on wd0b dump on wd0b
WARNING: / was not properly unmounted
clock: unknown CMOS layout
Automatic boot in progress: starting file system checks.
/dev/wd0a (e92757a70c986904.a): file system is clean; not checking
setting tty flags
pf enabled
starting network
DHCPREQUEST on run0 to 255.255.255.255
DHCPACK from 192.168.0.156 (00:01:8e:xx:xx:xx)
bound to 192.168.0.197 -- renewal in 157680000 seconds.
starting early daemons: syslogd pflogd ntpd.
starting RPC daemons:.
savecore: no core dump
checking quotas: done.
clearing /tmp
kern.securelevel: 0 -> 1
creating runtime link editor directory cache.
preserving editor files.
starting network daemons: sshd smtpd.
starting local daemons: cron.
Tue Nov 17 05:23:19 JST 2015

(the message stops here, no login prompt)
----

Without login prompt, there is no response when trying "echo aaa > /dev/tty03" via
network console.

You said that the uart.cpp's workaround is suitable for Vortex86EX C version,
please tell me how to know my Vortex86's version.

thanks,

2015 年 11 月 17 日
17:36:08
Android_Lin
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Forum Posts: 211
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2014 年 04 月 01 日
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Hello, uaa

Your log message shows the correct settings for serial ports, but no login prompt...
I think that you can try to change /etc/ttys file to let a user login, refer as following:

http://www.openbsd.org/faq/faq.....tml#SerCon

For CPU's version, currently, you are unable to get Vortex86EX version by programming. The Vortex86EX version shows on the surface of CPU chip and it looks like "XXXX-CTF", and 'C' of "CTF" is Vortex86EX version.

I think the problem should not be caused by uart hardware issue, if you want to test UART hardware(DB9 connector) on EduCake, can refer this post to test serial console under FreeDOS.

Android_Lin

2016 年 01 月 06 日
11:54:30
uaa
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Forum Posts: 11
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2013 年 12 月 02 日
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Hello Android_Lin, sorry for late reply.
Of course I set up /etc/ttys properly.

Today I tried OpenBSD 5.9-beta again, and I found that writing a value to
UART's LCR register sometimes fails. So DLM/DLL register cannot set correctly,
COM port will not work.

A diff (for sys/dev/ic/com.c) to check the register value is at http://www2192ue.sakura.ne.jp/.....106/1.diff
and here is a brief log.

comopen: ff 0d c1 03 0b 60 b0 00 01 00 c1 83 0b 60 b0 00
comparam: ff 0d c1 03 0b 60 b0 00 01 00 c1 83 0b 60 b0 00
comparam: ff 0d c1 03 0b 60 b0 00 01 00 c1 83 0b 60 b0 00
comparam: ff 00 c1 83 0b 60 b0 00 01 00 c1 83 0b 60 b0 00
comopen: ff 0d c1 83 0b 60 b0 00 0d 0d c1 83 0b 60 b0 00
comparam: ff 00 c1 03 0b 60 b0 00 0d 0d c1 83 0b 60 b0 00
comparam: ff 00 c1 03 0b 00 b0 00 0d 0d c1 83 0b 00 b0 00
comparam: ff 00 c1 03 0b 60 b0 00 01 0d c1 83 0b 60 b0 00

(former 8byte-hex is read with DLAB='0' and latter with DLAB='1')

2016 年 01 月 26 日
21:30:48
Android_Lin
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Forum Posts: 211
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2014 年 04 月 01 日
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Hi, uaa
That is a hardware bug for VORTEX86EX C version, you can try to use the workaround method like what you see in uart.cpp to set baudrate, also refer the line 489 ~ 505 in com.cpp of 86Duino Linux SDK.

2016 年 01 月 31 日
05:41:50
uaa
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Forum Posts: 11
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2013 年 12 月 02 日
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Hello, Android_Lin.

What does "Vortex86EX(D) wirite sync. issue" comment mean?
What is happening in this situation?
Is problem limited to DLL/DLM register? (I think LCR is also affected.)

And, infinite loop has a risk of system hang, I want to avoid it.
Can we replace the code like this?

- write DLL
- delay a bit
- write DLM
- delay a bit
- write LCR
- delay a bit

How long do we have to delay?

2016 年 02 月 02 日
21:28:26
Android_Lin
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Forum Posts: 211
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2014 年 04 月 01 日
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uaa said

Hello, Android_Lin.

What does "Vortex86EX(D) wirite sync. issue" comment mean?
What is happening in this situation?
Is problem limited to DLL/DLM register? (I think LCR is also affected.)

OK, i can explain this situation for details as following.

For Vortex86EX(C not D), there are two hardware issues when setting UART baudrate:
1. It is sometime fail to write DLL and DLM.
2. If write DLL and DLM successfully, it also needs delay some time (2~3 bit time) to active.
Above two issues are caused by PCI clock sync.
For the first issue, it appears sometimes, not always, the new baudrate will not be written into DLL and DLM if the PCI clock sync is fail, even add delay behind I/O function. For experiment, i try to add delay behind I/O function, and gradually increase delay if it is fail to sync, then still get error value when delay is up to 60ms, so write DLL or DLM again and again until success if the reading value of DLL or DLM is incorrect, this is why using infinite loop.
For the second issue, i add "io_inpb(0x80);" to wait for active, because the I/O accessing time is more than one needs.

I think that this method can avoid this bug completely under Linux if don't want to modify the UART driver.

Android_Lin

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