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Recompiling coreboot & seabios - need config files
2014 年 09 月 22 日
11:07:54
Glaux
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Hi,
please could you provide the config files for coreboot and seabios to be able to recompile it? I can found only a reference to http://www.coreboot.org and nothing else. I checkouted the sources but need config. Did you use something else specific during compilation?

2014 年 09 月 22 日
16:37:30
Android_Lin
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Hello,
Download the 86Duino coreboot config file here: http://www.roboard.com/temp/86.....config.zip

2014 年 09 月 22 日
17:11:16
Glaux
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Android_Lin said

Hello,
Download the 86Duino coreboot config file here: http://www.roboard.com/temp/86.....config.zip

Thank you, I can see the lines:
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
CONFIG_PAYLOAD_ELF=y
# CONFIG_PAYLOAD_LINUX is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../seabios/out/bios.bin.elf"
# CONFIG_COMPRESSED_PAYLOAD_LZMA is not set

This mean you compiled seabios externally. I think seabios has it's separate config file in seabios directory. Please could you upload it too?

2014 年 09 月 23 日
16:30:01
Android_Lin
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Hello,
Download the SeaBIOS binary file here: http://www.roboard.com/temp/SeaBIOS.zip

2014 年 09 月 23 日
17:20:13
Glaux
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Android_Lin said

Hello,
Download the SeaBIOS binary file here: http://www.roboard.com/temp/SeaBIOS.zip

Thank you, but I may like to recompile newer SeaBIOS so I would need config for it too.
I have one that was automatically created by coreboot when it downloaded seabios and it's located here.
\coreboot\payloads\external\SeaBIOS\seabios\.config

You probably have seabios in separate directory and you should have .config file there. Please upload it too.

2014 年 09 月 24 日
21:25:58
Android_Lin
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Hello, Glaux
For 86Duino coreboot and SeaBIOS, in compiling process, also need the crossbar config table. Our BIOS engineer is preparing the compiling flow guide and necessary files. Then i will upload them here if complete.

2014 年 09 月 25 日
08:17:33
Glaux
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Android_Lin said

Hello, Glaux
For 86Duino coreboot and SeaBIOS, in compiling process, also need the crossbar config table. Our BIOS engineer is preparing the compiling flow guide and necessary files. Then i will upload them here if complete.

Ouu, before I read this I recompiled the coreboot using your provided config and included your seabios.elf binary, flashed and it failed to boot (VGA is still blan, only change I made was enable of CONFIG_VGA_ROM_RUN=y). I belived, that all needed chipset configuration specifics was commited to coreboot main tree. So I need to unbrick it now. I have SPI programmer tool but as I can see the flash chip is 1,8V (abs. max. 2,5V) so I will probably need to make some level translator. Is it possible to program the SPI memory onboard via header? In this case should I hold reset so CPU will not disturb the programming process?

2014 年 09 月 25 日
19:48:46
roboard
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Glaux said
Ouu, before I read this I recompiled the coreboot using your provided config and included your seabios.elf binary, flashed and it failed to boot (VGA is still blan, only change I made was enable of CONFIG_VGA_ROM_RUN=y). I belived, that all needed chipset configuration specifics was commited to coreboot main tree. So I need to unbrick it now. I have SPI programmer tool but as I can see the flash chip is 1,8V (abs. max. 2,5V) so I will probably need to make some level translator. Is it possible to program the SPI memory onboard via header? In this case should I hold reset so CPU will not disturb the programming process?

Hi Glaux,
since different Vortex86EX boards have various crossbar settings according to the CPU customer's application, the crossbar tables for coreboot are usually prepared by the CPU customers. Except those files that Android Lin uploaded here, what you lack are the crossbar table of the 86Duino Zero board and the boot order file of SeaBIOS; Android Lin doesn't understand the building process of the BIOS so that he ignored to also upload the two files.

In your case, the reason that you fail to boot is that the pins of the SD card interface are not correctly routed to the on-board SD slot due to the lack of crossbar settings (see http://www.86duino.com/?page_i.....ck-diagram for an explanation of the crossbar); so Vortex86EX cannot detect the disk and halts after BIOS boots. But it is still possible to boot via a USB disk. You may make a bootable USB disk and write an autoexec.bat to try update the BIOS of the Zero board. (Note that in this case, since pins of serial ports are also incorrectly routed due to wrong crossbar settings, you cannot see any message from serial console even if you successfully boot on the USB disk.) You can find the BIOS update tool (spiflash.exe + cwsdpmi.exe) and the BIOS rom file (_core86.rom) of the Zero board in the SysImage tool (actually a FreeDOS image) of 86Duino. (The command is "spiflash.exe u _core86.rom nomd5".)

If the USB disk method fails, you may then try to directly program the SPI flash in case you have a SPI programmer tool. You cannot program the SPI flash onboard via the (JTAG) header if you have no the Vortex86EX JTAG tool. So you need to unsolder the SPI flash in order to program it. The SPI flash on the Zero board is MXIC MX25U6435F (datasheet: http://www.macronix.com/Lists/.....20v1.4.pdf), and you can get the BIOS rom file (_core86.rom) of the Zero board in SysImage; the 256KB rom file is in coreboot format and should be written into the end of the SPI memory space. When the SPI flash is correctly restored and soldered back, the Zero board should be able to boot again.

If the SPI flash method still unfortunately fails, I will mail you a new Zero board:)

2014 年 09 月 26 日
01:23:29
Glaux
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Hi roboard, thank you for the explanation.
Would you prepare the necessary files with some short brief note about coreboot compilation? I found bootorder text file in original image and I extracted it and inserted into my image. But I don't know where is the crossbar table. There was also 2 files in /etc/ directory but only 8B each.

I checked the schematics again and found that SPI memory is connected only with CPU, not the SPI header on base board - it's just some GPIO... Is there some simple JTAG circuit e.g. for parallel port that I could build and some programing app? Or does it work with OpenOCD?

I looked on Vcc line and I can see several voltage drops about 3-4s after reset so this indicate that CPU is doing some activity. Also PCIE line seems to be active so I can hope USB bootloader would work. How should I connect the USB flashdisk? Can I use microUSB host cable? (I bought one for tablet a week ago) or should I use USB header beside micro USB?

If it fails I can desolder the chip there's only isue that it is 1.8V chip but I could make some shifter...

BTW could you look at my problem with connecting PCI-E VGA? thread: http://www.86duino.com/?page_i.....a-to-pci-e
I saw your video
and I'd like to make it too. I use standard desktop VGA and my soldered PCI-E x1 adapter. I checked R26 on CPU board and R27 on base board to run PCIE host mode. I can discover VGA device in PCI space but its videobios cannot be found at C0000. So I think it's FW problem not HW....

2014 年 09 月 26 日
07:34:58
Glaux
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Oh, I looked at schematics and see that USB host is the connector beside micro USB, hm I have to find some connector with such fine pitch or I rather solder 4 wires on connector's pads on back side...

2014 年 09 月 27 日
00:28:25
Glaux
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Thanks, I was successful to unbrick my 86duino via USB boot. I made the cable, attached flashdisk with my bios backup and flash tool that I called from autoexec.bat:
anybios w BIOSDUMP.BIN skipmac >log.txt

I use anybios.exe that was supplied on system image, it reports version:
ANYBIOS 1.18 (Sep 12 2013)

my setup:

86Duino zero with USB host cable

2014 年 09 月 28 日
00:19:48
roboard
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Hi Glaux,
it is happy to see your 86Duino recovers :-)

I have discussed with the BIOS engineer; he ensured to write some clear guides for building coreboot BIOS running on 86Duino, but needs some time because he is currently working hard on another project. Android Lin will post these guides on this forum as soon as the BIOS engineer completes them.

OpenOCD doesn't work with Vortex86EX. The JTAG interface of Vortex86EX is not standard and thus the one needs the dedicated Vortex86EX JTAG tool to access the JTAG port on the 86Duino CPU module; that tool is distributed to CPU customers by the CPU sales department (whose email: soc@dmp.com.tw).

Running DOS games on 86Duino is fun but, up to now, we only do this on 86Duino One. I have discussed your VGA hack with the hardware engineer of 86Duino; he doubted that directly connecting the Zero board with a VGA card by soldering several (not strict) lines can satisfy the PCI-E signal condition. Bad signal conditioning may cause certain errors on PCI-E communication. But he wasn't assured on his opinion and so will make some experiment. We have picked an nvidia GPU card to try this hack and will discuss the result on this forum.

2014 年 09 月 30 日
19:35:56
Android_Lin
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Hello, Glaux
Our BIOS engineer provide a 86Duino BIOS compiling flow guide under Linux:

1. Download .tar file here: http://www.roboard.com/temp/co.....6duino.tar
2. To build .rom file according to the below steps:

    # Build in x86 Linux environment:

    tar -xvf coreboot-86duino.tar
    cd coreboot-86duino/

    git clone http://review.coreboot.org/p/coreboot
    git clone git://git.seabios.org/seabios.git

    cd seabios/
    git checkout 5aef563
    cp ../config.quiet-1.0 .config
    make

    cd ../coreboot/
    git checkout 1ce4860
    cp ../config.86duino-0.9beta .config
    make

    cd ..

    ./write-crossbar.py coreboot/build/coreboot.rom crossbar-86Duino.bin

    coreboot/build/cbfstool coreboot/build/coreboot.rom add -f bootorder-sd-usb-spi -n bootorder -t raw
    coreboot/build/cbfstool coreboot/build/coreboot.rom add-int -i 1 -n etc/boot-menu-wait
    coreboot/build/cbfstool coreboot/build/coreboot.rom add-int -i 0 -n etc/screen-and-debug

    # ROM file is in coreboot/build/coreboot.rom

(Note: The .rom file compiled by the above flow does not include 86Duino firmware system, and so you need to prepare a FreeDOS SD card to boot)

2014 年 10 月 01 日
06:53:29
Glaux
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Thank you, it looks quite clear to me.
I'm going to make my nightbuild soon ;)
BTW do you have some tool for generating the crossbar-86Duino.bin that would let me choose what peripheral on what pin? Or your engineers are so hardcore coders to write bit flags directly to bin file according to datasheet (OK, datasheet is lame, they surely have vortexEX embedded in brain :) )

2014 年 10 月 02 日
15:24:19
Android_Lin
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Hello, Glaux
Download this crossbar config tool here: http://www.roboard.com/temp/So.....fgTool.rar
(Note: it only runs under Windows)

2014 年 10 月 02 日
17:28:26
Glaux
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Thank you. It looks good. So now I could be able to enable COM2 and direct some coreboot debug boot messages there to see something.

Also I was able to successfully rebuild the Coreboot image according to your how-to.
I played with the options:
CONFIG_VGA_ROM_RUN = no
CONFIG_ON_DEVICE_ROM_RUN = yes
I readed in CB docs that if SeaBIOS payload is used, then you should leave this options disabled and SeaBIOS will run the option ROMs later. I tried it but no change with my VGA.
Then I tried to set
CONFIG_VGA_ROM_RUN = yes
and then it hanged at boot if VGA was connected on PCIE. If I unplugged VGA it boots OK. Unfortunatelly without seeing any log I cannot tell where it exactly hanged and if VGA BIOS was tried to run. Maybe there is really some incompatability of nvidia bios code.
Just for a test I tried to use nvidia video bios loader to load old GeForce4 BIOS (that also can be run in BOCHS emulator) and the loader loaded it - not hanged. Videobios image from GT230 or 9500 doesn't run in BOSCH. But it maybe a result of some uniinitialized registers, I don't know. BTW maybe I will get an ATI Radeon X1300 from a friend for further experiments.

2014 年 10 月 16 日
07:43:38
Glaux
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According to suggestion on SeaBIOS wiki I disabled running all vga/pci ROMs in coreboot and pass this job to SeaBIOS that runs them later. It works with my VGA after shadowram patch.

2014 年 12 月 10 日
16:52:48
alexx
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Android_Lin said
1. Download .tar file here: http://www.roboard.com/temp/co.....6duino.tar

Hello,
The above link is dead. Can you upload it again?

2014 年 12 月 15 日
10:41:02
Android_Lin
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Hello,
The above link is dead. Can you upload it again?

Hi, the link is available, try to download again.

2014 年 12 月 18 日
19:09:22
alexx
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Thanks, I downloaded it.

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