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Accessing GPIO on 86Duino in DOS environment and Assembly language
2018 年 11 月 06 日
New Member
Forum Posts: 4
Member Since:
2015 年 02 月 22 日

Can someone please put in plain words how to configure the SouthBridge to establish a Base Address for GPIO? According to the thread below, the GPIO is disabled until this happens. I am hoping to accomplish this using assembly language:

From the referenced thread:

The GPIO's base addresses need to be configured on EX (mean those addresses are not fixed). If not configure them, GPIO function is disable. A simple method to configure them as below for reference 86Duino source code:

1. access SouthBridge(SB) and set GPIO base address at 62h, 63h. For 86Duino, it is set as 0xF100 in standard I/O space. You can set another as you like (recommend to set a high address). Access SB method for refer to
2. access address 0xF100 (standard I/O space), set GPIO enable bit (0xF100h ~ 0xF103h).
3. set 0xF104 ~ 0xF107 for GPIO0's DIR base address and DATA base address, 0xF108 ~ 0xF10B for GPIO1's DIR base address and DATA base address and so on. For 86Duino, GPIO0's DIR address is set as 0xF202 and DATA address is 0xF200, GPIO1's DIR address is set as 0xF206 and DATA address is 0xF204 and so on.
4. access 0xF200 and 0xF202, you can use GPIO0, access 0xF204 and 0xF206 to use GPIO1 and so on.

In addition, to output GPIO signal, need to configure CORSSBAR as below:

1. set CROSSBAR base address at SB 0x64, 0x65. For 86Duino, it is set as 0x0A00 (standard I/O space).
2. start to access CROSSBAR function from address 0x0A00.
For reference,
(posted from



If anyone can guide me, I'd be extremely grateful!!

Thanks in advance,

2018 年 11 月 07 日
New Member
Forum Posts: 4
Member Since:
2015 年 02 月 22 日


Maybe I should back up and tell you what I THINK I have learned regarding enabling read/write on the GPIO lines through low-level language. Maybe someone can validate whether or not my understanding of this is thus far accurate.

In step 1 above, Android_Lin's instructions to Dinosaur are to access the "SouthBridge set GPIO address at 62h, 63h" but he doesn't go far enough to say exactly how to do this. I have read about PCI Configuration Address Register at 0CF8h. This register is accessible via a DOUBLE WORD access ONLY so I'm assuming the assembly language way to this will be something like:

MOV EAX, 8000####h (I don't know what this exact value should be. Another thing that I'm lost on).

I think the value for EAX above is best talked about on page 202 of the Vortex86EX Fact Sheet .pdf but maybe even prior to this step, I need to read the PCI Configuration Data Register at 0CFCh and do something with that value first. There is really no good source I've found for achieving the proper steps here. I hope to gain a clear understanding for this and be able to help someone else in the future with the same goals.

Hope someone out there can elaborate!


2019 年 04 月 27 日
Forum Posts: 17
Member Since:
2014 年 02 月 15 日

Hi jejump,

do you has found a solution for your problem? I have found a document which describe how to get accsess to the northbridge or southbridge in DOS.You can find it on
On page 17 is a very good and easy explanation how todo this.

Example : to get accsess to the northbridge (IDSEL = AD11 /Device 0) so you have to set bit 31 and bit 12 to '1'
this is 80000800 in hexadecimal
write this value to register 0xCF8h.
the next step is read the content the register 0xCFCh.

The result of these action is a long value : 601117F3 this means vendor id is 17F3h and the 6011h is the device id.


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